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Professional Profiles |
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IT-CAREERNET
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From: Anuradha Joshi I am into VLSI Design and wanna better opportunity in the same field.
Date: Sunday, March 26, 2006
Time: 09:49 AM
Anuradha Joshi anuradhavjoshi@yahoo.com Ph.: 09890734505 ____________________________________________________________________________ Profile : A hardworking, enthusiastic engineer willing to work in the challenging world of Electronics and VLSI design technology. Summary: Experience as a Technical consultant in VLSI design field. Knowledge of Digital, Full/Semi custom designs, HDLs, Synthesis, Simulation and STA for ASICS and CPLD, FPGA. Hands-on experience through coursework and projects in Front-end Design. Professional Experience: Working in UNITED TECHNOLOGIES LTD (a division of United Telecom), Pune, from May-2005 to Present. Worked in ICIT Pvt. Ltd., Pune, as VLSI Design project trainee under the guidance of Project Manager, TCS Pvt. Ltd from Dec’04 to April’05. Experience in the field of VLSI design. Responsibilities include Guidance and project assistance in Logic design, developing and verifying RTL designs using VHDL and Verilog HDL, currently working on synthesis, simulation, STA, DTA of digital designs and their implementation on CPLD and FPGA. Proficiency in Xilinx / Altera FPGAs, ASIC Design, PCI, Verilog/VHDL RTL design and verification, FPGA synthesis/Static timing Analysis, study of CMOS VLSI Design Technology, Testing and verification in Modelsim, Xilinx. Education: Enhanced skills in VLSI design Technology from Department of Electronic Science, University of Pune. Certificate Course in C from K.I.C.I.T., Nagpur. Qualification Name of Board/University Year of passing Percentage of marks B.E. (Industrial Electronics) P.C.E.A., Nagpur 2004 65% HSC Maharashtra Board 2000 70% SSC Maharashtra Board 1998 76% EDA Tools: Front End Flow: Synplify Pro, MODELSIM 5.7, Leonardo Spectrum 2001.b, Xilinx ISE 7.1. Physical Design Flow: ICrules, ICextract , Eldo, Xelga from Mentor Graphics MATLAB: Toolbox of Simulink, State flow, Multisim 7, Ultiboard, P-spice, ORCAD, Triscent, Keil. Projects: Design of a controller for producing variable duty cycle output for the control of supply power factor. Team Size : 1. Duration : March’06 to Present Client : Swee Technologies. The project includes design of a dutycycle controller which measures the incoming frequency in the range 5 to 50 Hz. and produces variable duty cycle output with the frequency range of 20 to 100 kHz. The design will be implemented on xilinx FPGA and will be used in Wind Mill Turbine Controller. Ethernet MAC Transmitter (IEEE 802.3): Team Size : 3. Duration : Dec’05 to Feb’06 The project includes design of Media access Control (MAC) Transmitter based on Ethernet 802.3 Standard. The design is divided into three main blocks Viz. Defer, Transmitter and CRC check, wherein I am involved in the design of Transmitter block. SDRAM Controller as PCI Slave. Duration: Dec.’04 to April’05. Our group of four has designed a simulation model of memory controller in VHDL, based on PCI and SDRAM protocols, which controls the data transactions between master (which drives PCI bus) and salve (SDRAM) by generating various control signals, thus making SDRAM compatible with PCI. The design was composed of two modules viz. PCI controller and Memory Controller, from which, I worked on the design and verification of PCI Controller. Smart Sensor Based “Smart Home” Duration: Jan’04 to June’04 Our group of five members created a model of comfortable and well protected residence, where the hardware consisted of temperature, light and fire sensors interfaced with programmed microcontroller 89C51, so as to get self actuated and controlled devices like air conditioners, lights and alarms. I worked on the software model, which was implemented as a state flow simulation in MATLAB . Optoelectronic Cordless Headphone: Duration: Jan’03 to April’03. Our group of three members designed a headphone, in which, sound was transferred through light from an audio source like TV to the headphone with the device range of 5 to 10 meters. The device provided entertainment with privacy and without cords. Achievements: The final year project on Smart Sensor Technology was awarded First Prize in National Level Model Competition hosted by Institute of Electrical and Electronic Engineering (IEEE), Nagpur. The miniproject, Optoelectronic Cordless Headphone was presented in National Level Paper and Project Competition, hosted by ‘Indian society for technical education (ISTE)’, Hyderabad, along with a paper on ‘Drip Irrigation’. Participated in National Level Paper Presentation Contest ‘Sanshodhan’, hosted by Priyadarshini College of Engineering, Nagpur, presented a paper on ‘SMART Sensor Technology’. Activities and Interests: Industrial Training in Dinshaw’s Pvt. Ltd. There I learnt implementation and usage of SCADA Software. Certificate Course in basic written and spoken German Language Distinction in ‘Praweshika Pratham and Praweshika Purna’ examinations of Classical music. Organized college events, national conventions, like ‘Shubham’, ‘Pratikriti’and raised funds up to the sum of Rs.10000. Personal Details: Address for correspondence: #1129, Vaman Smriti Apts, Sadashivpeth, Near chimna Ganpati Square, . Pune. Permanent Address: 47, Mallika Apts, Trimurti Nagar, Nagpur. Phone: (0712) 2238489. Date of Birth: 17th April 1983. Father’s Name : Shri. Vivek D. Joshi, WCL, Nagpur.
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